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| SC4250 POWER MANAGEMENT Absolute Maximum Ratings Exceeding the specifications below may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Parameter Supply Voltage DRAIN, PWRGD/ PWRGD SENSE, GATE UV, OV Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Operating Junction Temperature Range Storage Temperature Range Lead Temperature (Soldering) 10 sec Symbol V CC Maximum -0.3 to 100 -0.3 to 100 -0.3 to 20 -0.3 to 60 Units V V V V C C C C C J A J C TJ TSTG TLEAD 168 38.8 -40 to 125 -65 to 150 300 Electrical Characteristics Unless specified: TA = 25C, VCC = 48V, VEE = 0V. Values in bold apply over full operating temperature range. Parameter DC Characteristics Supply Operating Range Supply Current Circuit Breaker Trip Voltage Gate Pin Pull-up Current Gate Pin Pull-down Current Sense Pin Current External Gate Drive Symbol Test Conditions Min Typ Max Units V CC ICC V CB IPU IPD ISENSE VGATE UV = 3V, 0V = VEE, SENSE = VEE VCB = (VSENSE - VEE) Gate drive ON, VGATE = VEE Any fault condition VSENSE = 50mV (VGATE -VEE), 20V < VDD 80V (VGATE -VEE), 10V VDD 20V 10 3 50 60 -50 40 -0.05 9 13 8 1.241 1.192 1.273 1.223 50 VUV = VEE OV Low to High transition OV High to Low transition 1.192 1.153 -0.1 1.223 1.188 35 VOV 1.5V 2 80 5 70 V mA mV A mA A 16 V UV Pin High Threshold Voltage UV Pin Low Threshold Voltage UV Pin Hystersis UV Pin Input Current OV Pin High Threshold Voltage OV Pin Low Threshold Voltage OV Pin Hystersis OV Pin Input Current 2005 Semtech Corp. VUVH VUVL VUVHY IINUV VOVH VOVL VOVHY IINOV UV Low to High transition UV High to Low transition 1.305 1.253 V V mV A 1.253 1.223 V V mV A -0.05 www.semtech.com SC4250 POWER MANAGEMENT Electrical Characteristics (Cont.) Unless specified: TA = 25C, VCC = 48V, VEE = 0V. Values in bold apply over full operating temperature range. Parameter Power Good Threshold Power Good Threshold Hysteresis Drain Input Bias Current Output Low Voltage Symbol V PG VPGHY IDRAIN VOL Test Conditions VDRAIN - VEE, High to Low transition Min 1.5 Typ 1.75 0.4 Max 2.0 Units V V VDRAIN = 48V SC4250H, VOL = PWRGD - VDRAIN @ VDRAIN = 5V, IO = 1mA SC4250L, VOL = PWRGD - VEE @ VDRAIN = 1V, IO = 1mA 15 1 1 1.0 1.0 50 A V V Output Leakage IOH SC4250H, VDRAIN -VEE = 1V, VPWRGD = 80V SC4250L, VDRAIN -VEE = 5V 10 10 A A AC Characteristics OV High to Gate Low UV Low to Gate Low OV Low to Gate High UV Low to Gate High SENSE High to Gate Low DRAIN Low to PWRGD Low DRAIN Low to (PWRGD - DRAIN) High DRAIN High to PWRGD High DRAIN High to (PWRGD - DRAIN) Low Gate ON Time - Time Delay Gate ON Time - Time Delay tPHLOV tPHLUV tPLHOV tPLHUV tPHLSENSE tPHLPG 1.7 1.5 5.5 6.5 3 0.5 0.5 s s s s s s tPLHPG s tON_1 tON_2 VDRAIN > 8V, after short circuit VDRAIN < 7V, after short circuit 5 250 s s Note: (1) This device is ESD sensitive. Use of standard ESD handling precaution is required. 2005 Semtech Corp. 3 www.semtech.com SC4250 POWER MANAGEMENT Pin Configuration TOP VIEW PWRGD/PWRGD OV UV VEE 1 2 3 4 8 7 6 5 VCC DRAIN GATE SENSE Ordering Information Part Number SC4250HISTR SC4250HISTRT(2) SC4250LISTR SC4250LISTRT(2) SO-8 P ackag e (1) Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant. (SO-8) Pin Descriptions Pin 1 2 Pin Name PWRGD/PWRGD OV Pin Function Power Good output pin. This pin will toggle when VDRAIN is within VPG of VEE. This pin can be connected directly to the enable pin of a power module, 0.1F to VEE is optional. Analog Overvoltage input. When OV is pulled above the 1.223V threshold, an overvoltage condition is detected and the GATE pin will be immediately pulled low. The GATE pin will remain low until OV drops below the 1.188V high to low threshold. Analog Undervoltage input. When UV is pulled below the 1.223V threshold, an undervoltage condition is detected and the GATE pin will be immediately pulled low. The GATE pin will remain low until UV rises above the 1.273 threshold. The UV pin is also used to reset the electronic circuit breaker in the "latch OFF" version. If the UV pin is cycled low and high following the trip of the circuit breaker, the circuit breaker is reset and a normal power-up sequence will occur. Negative supply voltage input. Connect to the lower potential of the power supply. Circuit breaker sense pin. With a sense resistor placed in the supply path between VEE and SENSE, the circuit breaker will trip when the voltage across the resistor exceeds 60mV. Noise spikes of less than 2s are filtered out and will not trip the circuit breaker. If the circuit breaker trip current is set to twice the normal operating current, only 25mV is dropped across the sense resistor during normal operation. To disable the circuit breaker, VEE and SENSE can be shorted together. Gate drive output for external N-channel. The GATE pin will go high when the following start-up conditions are met: the UV pin is high, the OV pin is low and (VSENSE - VEE) < 60mV. The GATE pin is pulled high by a 50A current source and pulled low with a 40mA current source. Analog Drain sense input. Connect this pin to the drain of the external N-channel FET and the V(-) pin of the power module. When the DRAIN pin is below VPG, the PWRGD or PWRGD pin will toggle. Positive supply voltage input. Connect this pin to the higher potential of the power supply input and the V(+) pin of the power module 3 UV 4 5 VEE SENSE 6 GATE 7 DRAIN 8 VC C 2005 Semtech Corp. 4 www.semtech.com SC4250 POWER MANAGEMENT Block Diagrams Active High PWRGD Vcc PWRGD 12.5V Reg 1.223V 50uA UV _ + _ OV + _ + _ Delay _ 60mV 1.75V +7V + + Vee SENSE GATE DRAIN Active Low PWRGD Vcc PWRGD 12.5V Reg 1.223V 50uA UV _ + _ OV + _ + +7V Delay _ 60mV _ + 1.75V + Vee SENSE GATE DRAIN 2005 Semtech Corp. 5 www.semtech.com SC4250 POWER MANAGEMENT Applications Information Insertion of a power circuit board into a live backplane would draw enormous inrush currents. This is mostly due to the charging of the bulk electrolytic capacitors at the input of the power module being plugged in. The transient currents would send glitches all over the power system and could cause corruption of the signals and even a power down if the source isn't able to handle these high surges. This section describes the components selection needed for a typical application utilizing the SC4250. Let's assume the following requirements for a representative system: Input voltage range: 36V to 72V Nominal current: 2A typ. Over-current condition: 5A Vuv = 1.273V * (R1+R2+R3) / (R2+R3) Bulk capacitance: Cload = 150F Vov = 1.223V * (R1+R2+R3) / R3 The schematic in Figure 2 combines internal function blocks along with the external components of the application circuit. With the input bias current of the UV and OV comparators in the range of 20-30nA, let's choose the R1 to be 562k. This yields the values of R2=9.31k and R3 = 10.2k. With these values the accuracy is about 1% which is quite acceptable for those functions. Resistors R1, R2 and R3 make up a voltage divider to set the Under-Voltage (UV) and Over-Voltage (OV) trip points. When the input power supply ramps up the UV trips at 1.273V and OV trips at 1.223V; during the ramp down transition the UV trips at 1.223V and OV trips at 1.198V. The 50mV hysteresis for UV and 25mV hysteresis for OV provide the necessary guard-bands to prevent false tripping during power up and power down conditions. As an additional noise killing and stabilizing measure, the capacitor C1 should be placed at the OV terminal with the value in range from 1,000 to 10,000pF. For the UV=38V and OV=70V the values of the resistor can be calculated as follows: +48V Vcc PWRGD 12.5V Reg R1 1.223V 50uA UV _ + R2 _ OV + _ + C1 R3 +7V _ 60mV Delay _ + 1.75V + Vee SENSE GATE R5 C3 DRAIN Cload 150uF R6 C2 -48V R4 Q1 Figure 2 2005 Semtech Corp. 6 www.semtech.com SC4250 POWER MANAGEMENT Applications Information (Cont.) Resistor R4 sets the over-current trip. To choose R4, the user must determine the level of the current where it should trip. As a rule of thumb, the over-current is set to be 200-300% of the nominal value. In our case, we assumed this value to be 5A. Considering the minimum trip voltage is 50mV the value of R4 is 50mV / 5A = 10 m. The tolerance of this resistor is usually price driven and 5% is an adequate range of accuracy. The actual position and layout of the circuitry around the sense resistor R4 is critical to avoid a false over-current tripping. The trace routing between R4 and SC4250 should be as short as possible and wide enough to handle the maximum current with zero current in the sense lines - ideally "Kelvin" like. Additionally, there is a short delay circuit at the comparator to filter out unwanted noise and otherwise induced transients. Inrush Current is being controlled by the R5C3 network and swamping capacitor C2. When a board is plugged into a live backplane, the input bulk capacitance of the board's power supply produces large current transients due to the rush of the currents charging those capacitors. The main feature of the SC4250 is to provide an orderly and well-controlled inrush current. Since the minimum trip voltage is 50mV, let's choose the inrush current to be 3A. Imax = Cload * Vmax /dt dt = Cload * Vmax /Imax = 150F * 70V / 3A = 3.5ms This would be the minimum time for the gate voltage plateau during which the Vdd linearly decreases maintaining 3A charge current of the Cload. The inrush can be calculated using the following equation: IMAX = (50A * CLOAD) / C3 With the values shown in the schematic the actual inrush current will be about 2A, which is within the limits we have chosen. 2005 Semtech Corp. 7 www.semtech.com Resistor R5 will produce a time constant which prevents Q1 from turning on when power is initially applied and the circuit is not ready to actively pull the gate low. It's value is not critical and 18k ensures the adequate delay. The value of C2 is chosen to prevent false turn-on of the FET due to the current flowing via C3 into the gate of the FET when the circuit initially connects to the power source. Capacitors C2 and C3 form a divider from Vin to GND. C2 must keep the initial voltage at the gate below Vth minimum. For the typical FET, this threshold is around 1V to 2V, therefore C2 = 100 * C3 will keep gate voltage at 0.7V, even at the "worst" case of Vin = 70V. The choice of the Q1 is quite straightforward and is guided mostly by thermal considerations due to the power dissipation in the steady state. For instance, in our case, the nominal current is 2A, the power dissipation due to the conducting losses will be Pdis = Inom * Rds_on. The MOSFET should be able to withstand Vdss 100V with continuous drain current Id 6A. Device SUD06N10 or similar fits this application. It has an Rds_on = 0.2, and will dissipate Pdis = 2 * 0.2 = 0.8W, which can be handled by this DPAK device. If there is a consideration of reducing the temperature of the MOSFET then the lower Rds_on device should be chosen or a different style (D2PAK) which has lower Junction-to-Ambient thermal characteristics. The R6 has a function of dumping high frequency oscillations. The value of it is not critical and can be in the range of 5 to 20. SC4250 POWER MANAGEMENT Typical Characteristics Below are the snap-shots taken at start-up with different loading conditions and during the application of the overcurrent at the output of the circuit. For all figures, Ch1: VDRAIN; Ch2: VGATE; Ch3: PWRGD; Ch4: VR4 (Input current) Figure 3. Start-up with no load. Figure 4. Start-up with 1A load. Figure 5. Start-up with "over the limit" load. Figure 6. Over-current/Short circuit. 2005 Semtech Corp. 8 www.semtech.com SC4250 POWER MANAGEMENT Typical Characteristics (Cont.) The following set of snapshots demonstrates effectiveness of SC4250 circuit in the case where connection to the live back plane is very "bouncy", which is usually the situation with manual replacements of the power cards. For all figures, Ch1: VDRAIN; Ch2: VGATE; Ch3: PWRGD (referenced to VDRAIN); Ch4: VR4 (Input current) Figure 7. Start-up with no load. Figure 8. Start-up with 1A load. Figure 9. Start-up with "over the limit" load. Figure 10. Over-current/Short circuit. 2005 Semtech Corp. 9 www.semtech.com SC4250 POWER MANAGEMENT Evaluation Board Schematic G ND U1 SC4250H/L G ND(rem ote) 1 PWRGD/PWR GD VC C 8 R7 (opt) Copt 0.1 C1 0.1 R1 562k 2 OV DR AIN 7 ON/OFF +Vin R6 18k 3 UV GATE 6 +Vout C4 3.3nF C5 150 C6(opt) 0.1 POWER MODULE R2 9.31k 4 VEE SENSE 5 -Vin R5 10 C3 0.33 R4 0.01 Q1 IRF1310 -Vout R3 10.2k -- 48V C2(opt) 0.01 Figure 11 Evaluation Board Figure 12 2005 Semtech Corp. 10 www.semtech.com SC4250 POWER MANAGEMENT Evaluation Board - Bill of Materials R ef 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Qty 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C1 C2 (opt.) C3 C4 C5 C6 (opt.) Q1 R1 R2 R3 R4 R5 R6 R7 U1 Designator 0.1/100V 0.01 0.33 0.0033/100V 150/80V 0.1/100V IRF1310 562k 9.31k 10.2k 0.01 10 18k 5.1k S C 4250 Value Description Ceramic cap Ceramic cap Ceramic cap Ceramic cap Aluminum cap Ceramic cap MOSFET Resistor Resistor Resistor Resistor Resistor Resistor Resistor Semtech IC Footprint 1210 0805 1206S 0805 CAP-AL-H 1210 D2PAK 0805 0805 0805 2010C S 0805 0805 1206S SO-8 2005 Semtech Corp. 11 www.semtech.com SC4250 POWER MANAGEMENT Outline Drawing - SO-8 A N 2X E/2 E1 E 1 ccc C 2X N/2 TIPS 2 e/2 B D aaa C SEATING PLANE A2 A C bxN bbb A1 C A-B D GAGE PLANE 0.25 SEE DETAIL SIDE VIEW NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MS-012, VARIATION AA. e D DIM A A1 A2 b c D E1 E e h L L1 N 01 aaa bbb ccc DIMENSIONS MILLIMETERS INCHES MIN NOM MAX MIN NOM MAX .069 .053 .010 .004 .065 .049 .012 .020 .010 .007 .189 .193 .197 .150 .154 .157 .236 BSC .050 BSC .010 .020 .016 .028 .041 (.041) 8 0 8 .004 .010 .008 1.75 1.35 0.25 0.10 1.65 1.25 0.31 0.51 0.25 0.17 4.80 4.90 5.00 3.80 3.90 4.00 6.00 BSC 1.27 BSC 0.25 0.50 0.40 0.72 1.04 (1.04) 8 8 0 0.10 0.25 0.20 h h H c A L (L1) DETAIL 01 A Minimum Land Pattern - SO-8 X DIM (C) G Z C G P X Y Z DIMENSIONS INCHES MILLIMETERS (.205) .118 .050 .024 .087 .291 (5.20) 3.00 1.27 0.60 2.20 7.40 Y P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 2. REFERENCE IPC-SM-782A, RLP NO. 300A. Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804 2005 Semtech Corp. 12 www.semtech.com |
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